1. Technical Field
The embodiments herein generally relate to circuit design, and, more particularly, to a radio frequency wide band amplifier/buffer.
2. Description of the Related Art
Wide band amplifier/buffer with low noise and high linearity is desirable to save the cost of system level solution for many of today's bandwidth intensive applications. However, no circuit topologies exist that can simultaneously satisfy low noise, high linearity, reasonable power consumption and acceptable input/output matching at the same time. For example, in today's TV/cable tuner application, the loop through function process of buffering and amplifying input signal is to drive other TV/cable equipment, is preferred to be implemented on silicon to save system level solution cost. However, the loop through functions are carrying noise more than 6 dB.
With a conventional approach, gain and noise can be traded off against each other. Thus, customers have the following choices: a) live with the high noise b) trade off linearity with noise c) using passive splitter solution with increased system level solution cost to achieve 3 dB noise figure and high linearity at the same time. This is only a simple illustration showing that due to the current circuit performance limitation, customer either has to sacrifice performance or live with higher cost.
FIG. 1 is an example application of a cable TV tuner 100 where the loop through amplifier 104 is used to replicate the input signal to drive other TV equipment. The TV tuner RF front end 100 includes a low noise amplifier 102, the loop through amplifier 104, a mixer 106, and a radio frequency Phase locked loop (RF PLL) 108. The low noise amplifier 102 is connected to the mixer 106. The RF PLL 108 is connected to the mixer 106. The radio frequency input signal is transferred to the low noise amplifier 102 to amplify the signal. The baseband signal is received from the mixer. The loop through 104 receives the same radio frequency input signal which is transferred to the low noise amplifier 102 and transfer it to the other TV equipment to deliver the output signal.
FIG. 2A and FIG. 2B illustrate several methods of implementing loop through amplifiers 200A-B. Conventional implementation of the loop through amplifier, which is essentially a wide bandwidth, high linearity, low noise amplifier is implemented in a single stage amplifier. There are two commonly used architecture for single stage loop through amplifier. One is open drain architecture which is shown in FIG. 2A and other one is source degeneration architecture which is shown in FIG. 2B.
The loop through amplifier 200A of FIG. 2A includes an inductance coil 202, a capacitor C 204, a resistor R 206 and a NMOS transistor 208. The capacitor C 204 is directly connected to the resistor R 206. The NMOS transistor 208 is directly connected to the inductance 202. The other end of the NMOS transistor 208 is connected to the ground. The NMOS transistor 208 transfers the radio frequency output signal RF out as low noise, high linearity signal in a single stage. The loop through amplifier 200B of FIG. 2B includes a resistor R 210 and resistor R 214, a NMOS transistor 212. The NMOS transistor 212 is directly connected to the resistor R 210 and the resistor R 214.
Both the implementations (open drain architecture and source degeneration architecture) are carrying a noise figure higher than 6 dB. When any single stage amplifier is used to achieve a 3 dB noise figure, the gain with a matched 75 load will result in a gain of 10 dB to 12 dB from input to output. However, for a wide bandwidth amplifier at a large signal input amplitude, this gain causes distortion both at the amplifier output and the next stage where the signal level is increased. Typically, maximum gain should be less than 4 dB for loop through function to avoid distortion. Thus 2-stage amplifier architecture is needed to achieve desired design specification.
FIG. 3 illustrates a traditional two stage amplifier 300 that is mandated by the system to achieve a low noise and high linearity at the same time. The two stage amplifier includes a impedance R 302, a NMOS transistor 304, and a second stage amplifier 306. The impedance R 302 is directly connected to the NMOS transistor 304. The NMOS transistor 304 receives the radio frequency input signal RF in. In the first stage amplifier, the gain is limited with a low impedance to not cause degradation of linearity. The second stage amplifier 306 outputs the radio frequency output signal RFout as low noise and high linearity signal. If the first stage amplifier's gain is limited by a conventional impedance, which is a resistor, then the resistor R 302 contributes noise referred to the input and defeats lowering noise in the first place.
The 2nd stage amplifier 306 is used with the first stage amplifier to reduce the noise to 3 dB. The gain of the first stage amplifier is limited by using a low impedance to avoid distortion. However, because of the reduced gain, if a conventional impedance, which is a resistor, e.g., the resistor 302 is used, it will contribute noise referred to the input. Conventional implementation may not work as the contradictory requirement of high linearity and low noise cannot be met at the same time. Accordingly, there remains a need to achieve low noise and high linearity at the same time and simultaneously meet the stringent requirement of low noise and high linearity.